Discovery of Resource-Oriented Transition Systems for Yield Enhancement in Semiconductor Manufacturing
Abstract
In semiconductor manufacturing, data-driven methodologies have enabled the resolution of various issues, particularly yield management and enhancement. Yield, one of the crucial key performance indicators in semiconductor manufacturing, is mostly affected by production resources, i.e., equipment involved in the process. There is a lot of research on finding the correlation between yield and the status of resources. However, in general, multiple resources are engaged in production processes, which may cause multicollinearity among resources. Therefore, it is important to discover resource paths that are positively or negatively associated with yield. This article proposes a systematic methodology for discovering a resource-oriented transition system model in a semiconductor manufacturing process to identify resource paths resulting in high and low yield. The proposed method is based on the model-based analysis (i.e., finite state machine mining) in process mining and statistical analyses. We conducted an empirical study with real-life data from one of the leading semiconductor manufacturing companies to validate the proposed approach.
Practical problem
In a semiconductor fab a wafer passes through hundreds of process steps, and at each step one of many interchangeable machines or chambers can do the work. Yield engineers want to know which equipment is dragging down yield, but the usual analysis correlates yield with one machine at a time. Because thousands of machines are combined in countless sequences, a chamber that looks excellent in isolation may sit on a path that produces poor wafers, and the single-resource view is confounded by this multicollinearity. Engineers therefore need a way to see which sequences of resources, not individual machines, are associated with high or low yield, in a form compact enough to discuss and act upon.
Research questions
- How can resource paths, that is sequences of machines or chambers across process steps, that lead to high or low wafer yield be discovered from manufacturing execution data?
- Can a model discovered from such paths be simplified to the yield-relevant resources and used to predict the yield class of new wafers?
Contributions
- Formalizes a yield-enhanced event log in which each case (wafer) carries a mandatory yield attribute, and a resource-oriented finite state machine (FSM) whose states and events are the resources of process steps.
- A four-phase methodology: data preparation, FSM construction with best- and worst-case paths overlaid, statistical model simplification, and evaluation and interpretation.
- A best- and worst-case identification scheme that selects a normality test (Kolmogorov-Smirnov) and then uses either mean and standard deviation or median and median absolute deviation bands with a user-defined weight.
- A statistical simplification pipeline (ANOVA with linear contrasts, or Kruskal-Wallis with Mann-Whitney U tests) that labels resources high-class, low-class, or insignificant and merges insignificant resources per step with three merging variants.
- An empirical study on real manufacturing execution system data from one of the largest Korean semiconductor manufacturers, with a confusion-matrix evaluation protocol for best, moderate, and worst cases.
Key findings
- On a process of more than 500 steps, 74 expert-selected steps with roughly 13,000 wafers, 950,000 events, and over 1,500 resources are reduced to a model of 74 columns showing only yield-significant resources.
- With weight 0.5, 30% of wafers are classified as best and 30% as worst cases; in the first step alone 27% of outgoing arcs are associated with high yield and 36% with low yield.
- On the 10% held-out test set the discovered model classifies 83.3% of wafers correctly into best, moderate, or worst; 318 of 393 actual best cases (80.9%) are recovered and worst cases reach 85.7% accuracy.
- Almost no wafers are completely reversed (best predicted as worst or vice versa), and domain experts state willingness to use the resource paths for process operation.
- Experts flag false negatives, wafers predicted moderate that are actually worst, as the critical residual error needing post-hoc analysis; the method is offline and does not yet use real-time or sensor data.